2013-09-18 03:03:54 +00:00
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/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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2014-07-23 23:16:40 +00:00
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2013-09-18 03:03:54 +00:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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2014-07-23 23:16:40 +00:00
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2013-09-18 03:03:54 +00:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2014-07-23 23:16:40 +00:00
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2013-09-18 03:03:54 +00:00
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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2015-02-13 13:08:21 +00:00
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#include <cstring>
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2014-09-11 01:27:14 +00:00
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armemu.h"
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2013-09-18 03:03:54 +00:00
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/***************************************************************************\
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* Returns a new instantiation of the ARMulator's state *
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\***************************************************************************/
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2015-01-30 18:24:19 +00:00
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ARMul_State* ARMul_NewState(ARMul_State* state)
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2013-09-18 03:03:54 +00:00
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{
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2015-02-13 13:08:21 +00:00
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memset(state, 0, sizeof(ARMul_State));
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2014-07-23 23:16:40 +00:00
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state->Emulate = RUN;
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2015-02-10 17:37:28 +00:00
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for (unsigned int i = 0; i < 16; i++) {
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2014-07-23 23:16:40 +00:00
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state->Reg[i] = 0;
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2015-02-10 17:37:28 +00:00
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for (unsigned int j = 0; j < 7; j++)
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2014-07-23 23:16:40 +00:00
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state->RegBank[j][i] = 0;
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}
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2015-02-10 17:37:28 +00:00
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for (unsigned int i = 0; i < 7; i++)
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2014-07-23 23:16:40 +00:00
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state->Spsr[i] = 0;
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2015-02-10 17:37:28 +00:00
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2015-02-11 15:49:48 +00:00
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state->Mode = USER32MODE;
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2014-07-23 23:16:40 +00:00
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state->VectorCatch = 0;
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2015-02-10 17:37:28 +00:00
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state->Aborted = false;
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state->Reseted = false;
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2014-07-23 23:16:40 +00:00
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state->Inted = 3;
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state->LastInted = 3;
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state->lateabtSig = HIGH;
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state->bigendSig = LOW;
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2015-01-30 18:24:19 +00:00
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return state;
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2013-09-18 03:03:54 +00:00
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}
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/***************************************************************************\
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* Call this routine to set ARMulator to model a certain processor *
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\***************************************************************************/
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2015-01-30 18:24:19 +00:00
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void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
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2013-09-18 03:03:54 +00:00
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{
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2015-02-01 02:44:35 +00:00
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state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
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state->is_v5 = (properties & ARM_v5_Prop) != 0;
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state->is_v5e = (properties & ARM_v5e_Prop) != 0;
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state->is_v6 = (properties & ARM_v6_Prop) != 0;
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state->is_v7 = (properties & ARM_v7_Prop) != 0;
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2014-07-23 23:16:40 +00:00
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2015-02-12 20:04:47 +00:00
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// Only initialse the coprocessor support once we
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// know what kind of chip we are dealing with.
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ARMul_CoProInit(state);
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2013-09-18 03:03:54 +00:00
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}
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/***************************************************************************\
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* Call this routine to set up the initial machine state (or perform a RESET *
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\***************************************************************************/
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2015-01-30 18:24:19 +00:00
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void ARMul_Reset(ARMul_State* state)
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2013-09-18 03:03:54 +00:00
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{
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2014-07-23 23:16:40 +00:00
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state->NextInstr = 0;
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2015-02-11 17:19:49 +00:00
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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2015-01-30 18:24:19 +00:00
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2014-07-23 23:16:40 +00:00
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state->Bank = SVCBANK;
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FLUSHPIPE;
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state->EndCondition = 0;
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state->ErrorCode = 0;
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state->NresetSig = HIGH;
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state->NfiqSig = HIGH;
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state->NirqSig = HIGH;
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state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
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state->abortSig = LOW;
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state->AbortAddr = 1;
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state->NumInstrs = 0;
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2013-09-18 03:03:54 +00:00
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}
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