Implemented TMML
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0acf9b351f
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@ -533,6 +533,16 @@ union Instruction {
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BitField<31, 4, u64> component_mask;
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BitField<31, 4, u64> component_mask;
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} txq;
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} txq;
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union {
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BitField<28, 1, u64> array;
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BitField<29, 2, TextureType> texture_type;
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BitField<31, 4, u64> component_mask;
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bool IsComponentEnabled(size_t component) const {
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return ((1ull << component) & component_mask) != 0;
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}
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} tmml;
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union {
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union {
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BitField<28, 1, u64> array;
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BitField<28, 1, u64> array;
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BitField<29, 2, TextureType> texture_type;
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BitField<29, 2, TextureType> texture_type;
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@ -690,6 +700,8 @@ public:
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TLDS, // Texture Load with scalar/non-vec4 source/destinations
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TLDS, // Texture Load with scalar/non-vec4 source/destinations
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TLD4, // Texture Load 4
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TLD4, // Texture Load 4
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TLD4S, // Texture Load 4 with scalar / non - vec4 source / destinations
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TLD4S, // Texture Load 4 with scalar / non - vec4 source / destinations
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TMML_B, // Texture Mip Map Level
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TMML, // Texture Mip Map Level
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EXIT,
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EXIT,
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IPA,
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IPA,
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FFMA_IMM, // Fused Multiply and Add
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FFMA_IMM, // Fused Multiply and Add
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@ -914,6 +926,8 @@ private:
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INST("1101101---------", Id::TLDS, Type::Memory, "TLDS"),
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INST("1101101---------", Id::TLDS, Type::Memory, "TLDS"),
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INST("110010----111---", Id::TLD4, Type::Memory, "TLD4"),
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INST("110010----111---", Id::TLD4, Type::Memory, "TLD4"),
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INST("1101111100------", Id::TLD4S, Type::Memory, "TLD4S"),
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INST("1101111100------", Id::TLD4S, Type::Memory, "TLD4S"),
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INST("110111110110----", Id::TMML_B, Type::Memory, "TMML_B"),
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INST("1101111101011---", Id::TMML, Type::Memory, "TMML"),
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INST("111000110000----", Id::EXIT, Type::Trivial, "EXIT"),
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INST("111000110000----", Id::EXIT, Type::Trivial, "EXIT"),
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INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
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INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
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INST("0011001-1-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
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INST("0011001-1-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
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@ -1940,6 +1940,54 @@ private:
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}
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}
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break;
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break;
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}
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}
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case OpCode::Id::TMML: {
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
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const bool is_array = instr.tmml.array != 0;
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auto texture_type = instr.tmml.texture_type.Value();
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const std::string sampler = GetSampler(instr.sampler, texture_type, is_array);
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// TODO: add coordinates for different samplers once other texture types are
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// implemented.
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std::string coord;
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switch (texture_type) {
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case Tegra::Shader::TextureType::Texture1D: {
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std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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coord = "float coords = " + x + ';';
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break;
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}
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case Tegra::Shader::TextureType::Texture2D: {
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std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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std::string y = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
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coord = "vec2 coords = vec2(" + x + ", " + y + ");";
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break;
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}
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default:
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LOG_CRITICAL(HW_GPU, "Unhandled texture type {}",
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static_cast<u32>(texture_type));
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UNREACHABLE();
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// Fallback to interpreting as a 2D texture for now
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std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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std::string y = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
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coord = "vec2 coords = vec2(" + x + ", " + y + ");";
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texture_type = Tegra::Shader::TextureType::Texture2D;
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}
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// Add an extra scope and declare the texture coords inside to prevent
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// overwriting them in case they are used as outputs of the texs instruction.
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shader.AddLine('{');
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++shader.scope;
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shader.AddLine(coord);
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const std::string texture = "textureQueryLod(" + sampler + ", coords)";
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const std::string tmp = "vec2 tmp = " + texture + "*vec2(256.0, 256.0);";
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shader.AddLine(tmp);
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regs.SetRegisterToInteger(instr.gpr0, true, 0, "int(tmp.y)", 1, 1);
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regs.SetRegisterToInteger(instr.gpr0.Value() + 1, false, 0, "uint(tmp.x)", 1, 1);
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--shader.scope;
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shader.AddLine('}');
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break;
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}
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default: {
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default: {
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LOG_CRITICAL(HW_GPU, "Unhandled memory instruction: {}", opcode->GetName());
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LOG_CRITICAL(HW_GPU, "Unhandled memory instruction: {}", opcode->GetName());
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UNREACHABLE();
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UNREACHABLE();
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