GPU/Scheduling: Implement priority scheduling.
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commit
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@ -13,6 +13,7 @@
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#include "core/hle/service/nvdrv/nvdrv.h"
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#include "core/hle/service/nvdrv/nvdrv.h"
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#include "core/memory.h"
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#include "core/memory.h"
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#include "video_core/control/channel_state.h"
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#include "video_core/control/channel_state.h"
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#include "video_core/control/scheduler.h"
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#include "video_core/engines/puller.h"
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#include "video_core/engines/puller.h"
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#include "video_core/gpu.h"
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#include "video_core/gpu.h"
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#include "video_core/host1x/host1x.h"
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#include "video_core/host1x/host1x.h"
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@ -33,6 +34,7 @@ nvhost_gpu::nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
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syncpoint_manager{core_.GetSyncpointManager()}, nvmap{core.GetNvMapFile()},
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syncpoint_manager{core_.GetSyncpointManager()}, nvmap{core.GetNvMapFile()},
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channel_state{system.GPU().AllocateChannel()} {
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channel_state{system.GPU().AllocateChannel()} {
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channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
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channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
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channel_state->syncpoint_id = channel_syncpoint;
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sm_exception_breakpoint_int_report_event =
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sm_exception_breakpoint_int_report_event =
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events_interface.CreateEvent("GpuChannelSMExceptionBreakpointInt");
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events_interface.CreateEvent("GpuChannelSMExceptionBreakpointInt");
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sm_exception_breakpoint_pause_report_event =
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sm_exception_breakpoint_pause_report_event =
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@ -157,6 +159,9 @@ NvResult nvhost_gpu::SetErrorNotifier(IoctlSetErrorNotifier& params) {
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NvResult nvhost_gpu::SetChannelPriority(IoctlChannelSetPriority& params) {
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NvResult nvhost_gpu::SetChannelPriority(IoctlChannelSetPriority& params) {
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channel_priority = params.priority;
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channel_priority = params.priority;
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if (channel_state->initialized) {
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system.GPU().Scheduler().ChangePriority(channel_state->bind_id, channel_priority);
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}
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LOG_DEBUG(Service_NVDRV, "(STUBBED) called, priority={:X}", channel_priority);
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LOG_DEBUG(Service_NVDRV, "(STUBBED) called, priority={:X}", channel_priority);
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -314,6 +319,7 @@ NvResult nvhost_gpu::GetWaitbase(IoctlGetWaitbase& params) {
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NvResult nvhost_gpu::ChannelSetTimeout(IoctlChannelSetTimeout& params) {
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NvResult nvhost_gpu::ChannelSetTimeout(IoctlChannelSetTimeout& params) {
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LOG_INFO(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
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LOG_INFO(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
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channel_state->timeout = params.timeout;
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -321,6 +327,7 @@ NvResult nvhost_gpu::ChannelSetTimeslice(IoctlSetTimeslice& params) {
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LOG_INFO(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
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LOG_INFO(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
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channel_timeslice = params.timeslice;
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channel_timeslice = params.timeslice;
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channel_state->timeslice = params.timeslice;
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -45,6 +45,12 @@ struct ChannelState {
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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s32 bind_id = -1;
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s32 bind_id = -1;
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/// Scheduling info
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u32 syncpoint_id = 0xFFFF;
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u32 priority = 0;
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u32 timeslice = 0;
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u32 timeout = 0;
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/// 3D engine
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/// 3D engine
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std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
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std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
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/// 2D engine
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/// 2D engine
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@ -1,112 +1,243 @@
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// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
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// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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// SPDX-License-Identifier: GPL-3.0-or-later
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#include <atomic>
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#include <deque>
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#include <map>
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#include <memory>
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#include <memory>
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#include <mutex>
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#include <unordered_map>
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#include <utility>
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#include "common/assert.h"
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#include "common/assert.h"
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#include "video_core/control/channel_state.h"
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#include "common/fiber.h"
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#include "video_core/control/scheduler.h"
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#include "video_core/control/scheduler.h"
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#include "video_core/dma_pusher.h"
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#include "video_core/gpu.h"
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#include "video_core/gpu.h"
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namespace Tegra::Control {
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namespace Tegra::Control {
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Scheduler::Scheduler(GPU& gpu_) : gpu{gpu_} {}
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struct GPFifoContext {
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bool is_active;
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bool is_running;
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std::shared_ptr<Common::Fiber> context;
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std::deque<CommandList> pending_work;
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std::mutex guard;
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s32 bind_id;
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std::shared_ptr<ChannelState> info;
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size_t yield_count;
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size_t scheduled_count;
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};
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struct Scheduler::SchedulerImpl {
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// Fifos
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std::map<u32, std::list<size_t>, std::greater<u32>> schedule_priority_queue;
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std::unordered_map<s32, size_t> channel_gpfifo_ids;
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std::deque<GPFifoContext> gpfifos;
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std::deque<size_t> free_fifos;
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// Scheduling
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std::mutex scheduling_guard;
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std::shared_ptr<Common::Fiber> master_control;
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bool must_reschedule{};
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GPFifoContext* current_fifo{};
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};
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Scheduler::Scheduler(GPU& gpu_) : gpu{gpu_} {
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impl = std::make_unique<SchedulerImpl>();
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}
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Scheduler::~Scheduler() = default;
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Scheduler::~Scheduler() = default;
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void Scheduler::Init() {
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void Scheduler::Init() {
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master_control = Common::Fiber::ThreadToFiber();
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impl->master_control = Common::Fiber::ThreadToFiber();
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}
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}
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void Scheduler::Resume() {
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void Scheduler::Resume() {
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bool nothing_pending;
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while (UpdateHighestPriorityChannel()) {
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do {
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impl->current_fifo->scheduled_count++;
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nothing_pending = true;
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Common::Fiber::YieldTo(impl->master_control, *impl->current_fifo->context);
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current_fifo = nullptr;
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}
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{
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}
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std::unique_lock lk(scheduling_guard);
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size_t num_iters = gpfifos.size();
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bool Scheduler::UpdateHighestPriorityChannel() {
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for (size_t i = 0; i < num_iters; i++) {
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std::scoped_lock lk(impl->scheduling_guard);
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size_t current_id = (current_fifo_rotation_id + i) % gpfifos.size();
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auto& fifo = gpfifos[current_id];
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// Clear needs to schedule state.
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if (!fifo.is_active) {
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impl->must_reschedule = false;
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continue;
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}
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// By default, we don't have a channel to schedule.
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std::scoped_lock lk2(fifo.guard);
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impl->current_fifo = nullptr;
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if (!fifo.pending_work.empty() || fifo.working.load(std::memory_order_acquire)) {
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current_fifo = &fifo;
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// Check each level to see if we can schedule.
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current_fifo_rotation_id = current_id;
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for (auto& level : impl->schedule_priority_queue) {
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nothing_pending = false;
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if (ScheduleLevel(level.second)) {
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break;
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return true;
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}
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}
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}
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}
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if (current_fifo) {
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}
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Common::Fiber::YieldTo(master_control, *current_fifo->context);
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current_fifo = nullptr;
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// Nothing to schedule.
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return false;
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}
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bool Scheduler::ScheduleLevel(std::list<size_t>& queue) {
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bool found_anything = false;
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size_t min_schedule_count = std::numeric_limits<size_t>::max();
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for (auto id : queue) {
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auto& fifo = impl->gpfifos[id];
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std::scoped_lock lk(fifo.guard);
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// With no pending work and nothing running, this channel can't be scheduled.
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if (fifo.pending_work.empty() && !fifo.is_running) {
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continue;
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}
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}
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} while (!nothing_pending);
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// Prioritize channels at current priority which have been run the least.
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if (fifo.scheduled_count > min_schedule_count) {
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continue;
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}
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// Try not to select the same channel we just yielded from.
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if (fifo.scheduled_count < fifo.yield_count) {
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fifo.scheduled_count++;
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continue;
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}
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// Update best selection.
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min_schedule_count = fifo.scheduled_count;
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impl->current_fifo = &fifo;
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found_anything = true;
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}
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return found_anything;
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}
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void Scheduler::ChangePriority(s32 channel_id, u32 new_priority) {
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std::scoped_lock lk(impl->scheduling_guard);
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// Ensure we are tracking this channel.
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auto fifo_it = impl->channel_gpfifo_ids.find(channel_id);
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if (fifo_it == impl->channel_gpfifo_ids.end()) {
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return;
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}
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// Get the fifo and update its priority.
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const size_t fifo_id = fifo_it->second;
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auto& fifo = impl->gpfifos[fifo_id];
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const auto old_priority = std::exchange(fifo.info->priority, new_priority);
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// Create the new level if needed.
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impl->schedule_priority_queue.try_emplace(new_priority);
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// Remove the old level and add to the new level.
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impl->schedule_priority_queue[new_priority].push_back(fifo_id);
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impl->schedule_priority_queue[old_priority].remove_if(
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[fifo_id](size_t id) { return id == fifo_id; });
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}
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}
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void Scheduler::Yield() {
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void Scheduler::Yield() {
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ASSERT(current_fifo != nullptr);
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ASSERT(impl->current_fifo != nullptr);
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Common::Fiber::YieldTo(current_fifo->context, *master_control);
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gpu.BindChannel(current_fifo->bind_id);
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// Set yield count higher
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impl->current_fifo->yield_count = impl->current_fifo->scheduled_count + 1;
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Common::Fiber::YieldTo(impl->current_fifo->context, *impl->master_control);
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gpu.BindChannel(impl->current_fifo->bind_id);
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}
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void Scheduler::CheckStatus() {
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{
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std::unique_lock lk(impl->scheduling_guard);
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// If no reschedule is needed, don't transfer control
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if (!impl->must_reschedule) {
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return;
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}
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}
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// Transfer control to the scheduler
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Common::Fiber::YieldTo(impl->current_fifo->context, *impl->master_control);
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gpu.BindChannel(impl->current_fifo->bind_id);
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}
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}
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void Scheduler::Push(s32 channel, CommandList&& entries) {
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void Scheduler::Push(s32 channel, CommandList&& entries) {
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std::unique_lock lk(scheduling_guard);
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std::scoped_lock lk(impl->scheduling_guard);
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auto it = channel_gpfifo_ids.find(channel);
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// Get and ensure we have this channel.
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ASSERT(it != channel_gpfifo_ids.end());
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auto it = impl->channel_gpfifo_ids.find(channel);
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ASSERT(it != impl->channel_gpfifo_ids.end());
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auto gpfifo_id = it->second;
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auto gpfifo_id = it->second;
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auto& fifo = gpfifos[gpfifo_id];
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auto& fifo = impl->gpfifos[gpfifo_id];
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// Add the new new work to the channel.
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{
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{
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std::scoped_lock lk2(fifo.guard);
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std::scoped_lock lk2(fifo.guard);
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fifo.pending_work.emplace_back(std::move(entries));
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fifo.pending_work.emplace_back(std::move(entries));
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}
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}
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// If the current running FIFO is null or the one being pushed to then
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// just return
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if (impl->current_fifo == nullptr || impl->current_fifo == &fifo) {
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return;
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}
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// If the current fifo has higher or equal priority to the current fifo then return
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if (impl->current_fifo->info->priority >= fifo.info->priority) {
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return;
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}
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// Mark scheduler update as required.
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impl->must_reschedule = true;
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}
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}
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void Scheduler::ChannelLoop(size_t gpfifo_id, s32 channel_id) {
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void Scheduler::ChannelLoop(size_t gpfifo_id, s32 channel_id) {
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gpu.BindChannel(channel_id);
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auto& fifo = impl->gpfifos[gpfifo_id];
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auto& fifo = gpfifos[gpfifo_id];
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auto* channel_state = fifo.info.get();
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while (true) {
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const auto SendToPuller = [&] {
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auto* channel_state = channels[channel_id].get();
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std::scoped_lock lk(fifo.guard);
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fifo.guard.lock();
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if (fifo.pending_work.empty()) {
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while (!fifo.pending_work.empty()) {
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// Stop if no work available.
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{
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fifo.is_running = false;
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return false;
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fifo.working.store(true, std::memory_order_release);
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CommandList&& entries = std::move(fifo.pending_work.front());
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channel_state->dma_pusher->Push(std::move(entries));
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fifo.pending_work.pop_front();
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}
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fifo.guard.unlock();
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channel_state->dma_pusher->DispatchCalls();
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fifo.guard.lock();
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}
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}
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fifo.working.store(false, std::memory_order_relaxed);
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// Otherwise, send work to puller and mark as running.
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fifo.guard.unlock();
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CommandList&& entries = std::move(fifo.pending_work.front());
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Common::Fiber::YieldTo(fifo.context, *master_control);
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channel_state->dma_pusher->Push(std::move(entries));
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fifo.pending_work.pop_front();
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fifo.is_running = true;
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// Succeed.
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return true;
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};
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// Inform the GPU about the current channel.
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gpu.BindChannel(channel_id);
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while (true) {
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while (SendToPuller()) {
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// Execute.
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channel_state->dma_pusher->DispatchCalls();
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// Reschedule.
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CheckStatus();
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}
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// Return to host execution when all work is completed.
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Common::Fiber::YieldTo(fifo.context, *impl->master_control);
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// Inform the GPU about the current channel.
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gpu.BindChannel(channel_id);
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gpu.BindChannel(channel_id);
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}
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}
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}
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}
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void Scheduler::DeclareChannel(std::shared_ptr<ChannelState> new_channel) {
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void Scheduler::DeclareChannel(std::shared_ptr<ChannelState> new_channel) {
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s32 channel = new_channel->bind_id;
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s32 channel = new_channel->bind_id;
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std::unique_lock lk(scheduling_guard);
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std::unique_lock lk(impl->scheduling_guard);
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channels.emplace(channel, new_channel);
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size_t new_fifo_id;
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size_t new_fifo_id;
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if (!free_fifos.empty()) {
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if (!impl->free_fifos.empty()) {
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new_fifo_id = free_fifos.front();
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new_fifo_id = impl->free_fifos.front();
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free_fifos.pop_front();
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impl->free_fifos.pop_front();
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} else {
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} else {
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new_fifo_id = gpfifos.size();
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new_fifo_id = impl->gpfifos.size();
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gpfifos.emplace_back();
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impl->gpfifos.emplace_back();
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}
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}
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auto& new_fifo = gpfifos[new_fifo_id];
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auto& new_fifo = impl->gpfifos[new_fifo_id];
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channel_gpfifo_ids[channel] = new_fifo_id;
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impl->channel_gpfifo_ids[channel] = new_fifo_id;
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new_fifo.is_active = true;
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new_fifo.is_active = true;
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new_fifo.bind_id = channel;
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new_fifo.bind_id = channel;
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new_fifo.pending_work.clear();
|
new_fifo.pending_work.clear();
|
||||||
|
new_fifo.info = new_channel;
|
||||||
|
new_fifo.scheduled_count = 0;
|
||||||
|
new_fifo.yield_count = 0;
|
||||||
|
new_fifo.is_running = false;
|
||||||
|
impl->schedule_priority_queue.try_emplace(new_channel->priority);
|
||||||
|
impl->schedule_priority_queue[new_channel->priority].push_back(new_fifo_id);
|
||||||
std::function<void()> callback = std::bind(&Scheduler::ChannelLoop, this, new_fifo_id, channel);
|
std::function<void()> callback = std::bind(&Scheduler::ChannelLoop, this, new_fifo_id, channel);
|
||||||
new_fifo.context = std::make_shared<Common::Fiber>(std::move(callback));
|
new_fifo.context = std::make_shared<Common::Fiber>(std::move(callback));
|
||||||
}
|
}
|
||||||
|
@ -3,13 +3,11 @@
|
|||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#include <atomic>
|
#include <list>
|
||||||
#include <deque>
|
|
||||||
#include <memory>
|
#include <memory>
|
||||||
#include <mutex>
|
|
||||||
#include <unordered_map>
|
|
||||||
|
|
||||||
#include "common/fiber.h"
|
#include "common/common_types.h"
|
||||||
|
#include "video_core/control/channel_state.h"
|
||||||
#include "video_core/dma_pusher.h"
|
#include "video_core/dma_pusher.h"
|
||||||
|
|
||||||
namespace Tegra {
|
namespace Tegra {
|
||||||
@ -35,26 +33,18 @@ public:
|
|||||||
|
|
||||||
void DeclareChannel(std::shared_ptr<ChannelState> new_channel);
|
void DeclareChannel(std::shared_ptr<ChannelState> new_channel);
|
||||||
|
|
||||||
|
void ChangePriority(s32 channel_id, u32 new_priority);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
void ChannelLoop(size_t gpfifo_id, s32 channel_id);
|
void ChannelLoop(size_t gpfifo_id, s32 channel_id);
|
||||||
|
bool ScheduleLevel(std::list<size_t>& queue);
|
||||||
|
void CheckStatus();
|
||||||
|
bool UpdateHighestPriorityChannel();
|
||||||
|
|
||||||
|
struct SchedulerImpl;
|
||||||
|
std::unique_ptr<SchedulerImpl> impl;
|
||||||
|
|
||||||
std::unordered_map<s32, std::shared_ptr<ChannelState>> channels;
|
|
||||||
std::unordered_map<s32, size_t> channel_gpfifo_ids;
|
|
||||||
std::mutex scheduling_guard;
|
|
||||||
std::shared_ptr<Common::Fiber> master_control;
|
|
||||||
struct GPFifoContext {
|
|
||||||
bool is_active;
|
|
||||||
std::shared_ptr<Common::Fiber> context;
|
|
||||||
std::deque<CommandList> pending_work;
|
|
||||||
std::atomic<bool> working{};
|
|
||||||
std::mutex guard;
|
|
||||||
s32 bind_id;
|
|
||||||
};
|
|
||||||
std::deque<GPFifoContext> gpfifos;
|
|
||||||
std::deque<size_t> free_fifos;
|
|
||||||
GPU& gpu;
|
GPU& gpu;
|
||||||
size_t current_fifo_rotation_id{};
|
|
||||||
GPFifoContext* current_fifo{};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
} // namespace Control
|
} // namespace Control
|
||||||
|
Loading…
Reference in New Issue
Block a user