Shader_IR: Address Feedback.
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e3afd6595a
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@ -72,7 +72,7 @@ struct HashableStruct {
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struct PairHash {
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template <class T1, class T2>
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std::size_t operator()(const std::pair<T1, T2>& pair) const {
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std::size_t operator()(const std::pair<T1, T2>& pair) const noexcept {
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std::size_t seed = std::hash<T1>()(pair.first);
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boost::hash_combine(seed, std::hash<T2>()(pair.second));
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return seed;
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@ -34,6 +34,10 @@ struct SamplerDescriptor {
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return raw == rhs.raw;
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}
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bool operator!=(const SamplerDescriptor& rhs) const noexcept {
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return !operator==(rhs);
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}
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static SamplerDescriptor FromTicTexture(Tegra::Texture::TextureType tic_texture_type) {
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SamplerDescriptor result;
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switch (tic_texture_type) {
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@ -73,13 +77,12 @@ struct SamplerDescriptor {
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result.is_buffer.Assign(0);
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result.is_shadow.Assign(0);
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return result;
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case Tegra::Texture::TextureType::Texture1DBuffer: {
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case Tegra::Texture::TextureType::Texture1DBuffer:
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result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
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result.is_array.Assign(0);
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result.is_buffer.Assign(1);
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result.is_shadow.Assign(0);
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return result;
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}
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case Tegra::Texture::TextureType::Texture2DNoMipmap:
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result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
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result.is_array.Assign(0);
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@ -105,7 +108,7 @@ static_assert(std::is_trivially_copyable_v<SamplerDescriptor>);
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class ConstBufferEngineInterface {
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public:
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virtual ~ConstBufferEngineInterface() {}
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virtual ~ConstBufferEngineInterface() = default;
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virtual u32 AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offset) const = 0;
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virtual SamplerDescriptor AccessBoundSampler(ShaderType stage, u64 offset) const = 0;
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virtual SamplerDescriptor AccessBindlessSampler(ShaderType stage, u64 const_buffer,
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@ -22,6 +22,8 @@ ConstBufferLocker::ConstBufferLocker(Tegra::Engines::ShaderType shader_stage,
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Tegra::Engines::ConstBufferEngineInterface& engine)
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: stage{shader_stage}, engine{&engine} {}
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ConstBufferLocker::~ConstBufferLocker() = default;
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std::optional<u32> ConstBufferLocker::ObtainKey(u32 buffer, u32 offset) {
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const std::pair<u32, u32> key = {buffer, offset};
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const auto iter = keys.find(key);
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@ -29,7 +31,7 @@ std::optional<u32> ConstBufferLocker::ObtainKey(u32 buffer, u32 offset) {
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return iter->second;
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}
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if (!engine) {
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return {};
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return std::nullopt;
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}
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const u32 value = engine->AccessConstBuffer32(stage, buffer, offset);
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keys.emplace(key, value);
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@ -43,7 +45,7 @@ std::optional<SamplerDescriptor> ConstBufferLocker::ObtainBoundSampler(u32 offse
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return iter->second;
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}
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if (!engine) {
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return {};
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return std::nullopt;
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}
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const SamplerDescriptor value = engine->AccessBoundSampler(stage, offset);
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bound_samplers.emplace(key, value);
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@ -58,7 +60,7 @@ std::optional<Tegra::Engines::SamplerDescriptor> ConstBufferLocker::ObtainBindle
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return iter->second;
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}
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if (!engine) {
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return {};
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return std::nullopt;
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}
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const SamplerDescriptor value = engine->AccessBindlessSampler(stage, buffer, offset);
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bindless_samplers.emplace(key, value);
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@ -16,6 +16,11 @@ using BoundSamplerMap = std::unordered_map<u32, Tegra::Engines::SamplerDescripto
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using BindlessSamplerMap =
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std::unordered_map<std::pair<u32, u32>, Tegra::Engines::SamplerDescriptor, Common::PairHash>;
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/**
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* The ConstBufferLocker is a class use to interface the 3D and compute engines with the shader
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* compiler. with it, the shader can obtain required data from GPU state and store it for disk
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* shader compilation.
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**/
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class ConstBufferLocker {
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public:
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explicit ConstBufferLocker(Tegra::Engines::ShaderType shader_stage);
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@ -23,6 +28,8 @@ public:
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explicit ConstBufferLocker(Tegra::Engines::ShaderType shader_stage,
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Tegra::Engines::ConstBufferEngineInterface& engine);
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~ConstBufferLocker();
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/// Retrieves a key from the locker, if it's registered, it will give the registered value, if
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/// not it will obtain it from maxwell3d and register it.
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std::optional<u32> ObtainKey(u32 buffer, u32 offset);
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@ -41,14 +41,10 @@ BlockBranchInfo MakeBranchInfo(Args&&... args) {
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return std::make_shared<BranchData>(T(std::forward<Args>(args)...));
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}
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bool BlockBranchInfoAreEqual(BlockBranchInfo first, BlockBranchInfo second) {
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return false; //(*first) == (*second);
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}
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bool BlockBranchIsIgnored(BlockBranchInfo first) {
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bool ignore = false;
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if (std::holds_alternative<SingleBranch>(*first)) {
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auto branch = std::get_if<SingleBranch>(first.get());
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const auto branch = std::get_if<SingleBranch>(first.get());
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ignore = branch->ignore;
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}
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return ignore;
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@ -151,10 +147,10 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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const Instruction instr = {state.program_code[pos]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() != OpCode::Id::BRX) {
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return {};
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return std::nullopt;
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}
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if (instr.brx.constant_buffer != 0) {
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return {};
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return std::nullopt;
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}
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track_register = instr.gpr8.Value();
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result.relative_position = instr.brx.GetBranchExtend();
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@ -172,8 +168,8 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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if (opcode->get().GetId() == OpCode::Id::LD_C) {
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if (instr.gpr0.Value() == track_register &&
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instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single) {
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result.buffer = instr.cbuf36.index;
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result.offset = instr.cbuf36.GetOffset();
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result.buffer = instr.cbuf36.index.Value();
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result.offset = static_cast<u32>(instr.cbuf36.GetOffset());
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track_register = instr.gpr8.Value();
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pos--;
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found_track = true;
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@ -184,7 +180,7 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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}
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if (!found_track) {
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return {};
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return std::nullopt;
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}
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found_track = false;
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@ -194,7 +190,7 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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pos--;
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continue;
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}
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const Instruction instr = {state.program_code[pos]};
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const Instruction instr = state.program_code[pos];
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::SHL_IMM) {
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if (instr.gpr0.Value() == track_register) {
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@ -208,7 +204,7 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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}
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if (!found_track) {
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return {};
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return std::nullopt;
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}
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found_track = false;
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@ -218,7 +214,7 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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pos--;
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continue;
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}
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const Instruction instr = {state.program_code[pos]};
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const Instruction instr = state.program_code[pos];
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::IMNMX_IMM) {
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if (instr.gpr0.Value() == track_register) {
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@ -233,9 +229,9 @@ std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState&
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}
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if (!found_track) {
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return {};
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return std::nullopt;
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}
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return {result};
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return result;
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}
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std::pair<ParseResult, ParseInfo> ParseCode(CFGRebuildState& state, u32 address) {
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@ -440,8 +436,8 @@ std::pair<ParseResult, ParseInfo> ParseCode(CFGRebuildState& state, u32 address)
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branches.emplace_back(value, target);
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}
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parse_info.end_address = offset;
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parse_info.branch_info =
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MakeBranchInfo<MultiBranch>(static_cast<u32>(instr.gpr8.Value()), branches);
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parse_info.branch_info = MakeBranchInfo<MultiBranch>(
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static_cast<u32>(instr.gpr8.Value()), std::move(branches));
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return {ParseResult::ControlCaught, parse_info};
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} else {
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@ -486,7 +482,7 @@ bool TryInspectAddress(CFGRebuildState& state) {
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current_block.end = address - 1;
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new_block.branch = current_block.branch;
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BlockBranchInfo forward_branch = MakeBranchInfo<SingleBranch>();
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auto branch = std::get_if<SingleBranch>(forward_branch.get());
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const auto branch = std::get_if<SingleBranch>(forward_branch.get());
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branch->address = address;
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branch->ignore = true;
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current_block.branch = forward_branch;
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@ -504,7 +500,7 @@ bool TryInspectAddress(CFGRebuildState& state) {
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BlockInfo& block_info = CreateBlockInfo(state, address, parse_info.end_address);
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block_info.branch = parse_info.branch_info;
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if (std::holds_alternative<SingleBranch>(*block_info.branch)) {
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auto branch = std::get_if<SingleBranch>(block_info.branch.get());
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const auto branch = std::get_if<SingleBranch>(block_info.branch.get());
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if (branch->condition.IsUnconditional()) {
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return true;
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}
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@ -550,7 +546,7 @@ bool TryQuery(CFGRebuildState& state) {
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gather_labels(q2.ssy_stack, state.ssy_labels, block);
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gather_labels(q2.pbk_stack, state.pbk_labels, block);
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if (std::holds_alternative<SingleBranch>(*block.branch)) {
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auto branch = std::get_if<SingleBranch>(block.branch.get());
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const auto branch = std::get_if<SingleBranch>(block.branch.get());
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if (!branch->condition.IsUnconditional()) {
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q2.address = block.end + 1;
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state.queries.push_back(q2);
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@ -573,8 +569,8 @@ bool TryQuery(CFGRebuildState& state) {
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state.queries.push_back(std::move(conditional_query));
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return true;
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}
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auto multi_branch = std::get_if<MultiBranch>(block.branch.get());
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for (auto& branch_case : multi_branch->branches) {
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const auto multi_branch = std::get_if<MultiBranch>(block.branch.get());
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for (const auto& branch_case : multi_branch->branches) {
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Query conditional_query{q2};
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conditional_query.address = branch_case.address;
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state.queries.push_back(std::move(conditional_query));
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@ -612,7 +608,7 @@ void InsertBranch(ASTManager& mm, const BlockBranchInfo& branch_info) {
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return MakeExpr<ExprBoolean>(true);
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});
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if (std::holds_alternative<SingleBranch>(*branch_info)) {
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auto branch = std::get_if<SingleBranch>(branch_info.get());
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const auto branch = std::get_if<SingleBranch>(branch_info.get());
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if (branch->address < 0) {
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if (branch->kill) {
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mm.InsertReturn(get_expr(branch->condition), true);
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@ -624,8 +620,8 @@ void InsertBranch(ASTManager& mm, const BlockBranchInfo& branch_info) {
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mm.InsertGoto(get_expr(branch->condition), branch->address);
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return;
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}
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auto multi_branch = std::get_if<MultiBranch>(branch_info.get());
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for (auto& branch_case : multi_branch->branches) {
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const auto multi_branch = std::get_if<MultiBranch>(branch_info.get());
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for (const auto& branch_case : multi_branch->branches) {
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mm.InsertGoto(MakeExpr<ExprGprEqual>(multi_branch->gpr, branch_case.cmp_value),
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branch_case.address);
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}
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@ -51,6 +51,10 @@ public:
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std::tie(b.condition, b.address, b.kill, b.is_sync, b.is_brk, b.ignore);
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}
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bool operator!=(const SingleBranch& b) const {
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return !operator==(b);
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}
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Condition condition{};
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s32 address{exit_branch};
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bool kill{};
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@ -67,7 +71,7 @@ struct CaseBranch {
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class MultiBranch {
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public:
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MultiBranch(u32 gpr, std::vector<CaseBranch>& branches)
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MultiBranch(u32 gpr, std::vector<CaseBranch>&& branches)
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: gpr{gpr}, branches{std::move(branches)} {}
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u32 gpr{};
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@ -155,7 +155,7 @@ void ShaderIR::Decode() {
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[[fallthrough]];
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case CompileDepth::BruteForce: {
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coverage_begin = main_offset;
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const u32 shader_end = program_code.size();
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const std::size_t shader_end = program_code.size();
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coverage_end = shader_end;
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for (u32 label = main_offset; label < shader_end; label++) {
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basic_blocks.insert({label, DecodeRange(label, label + 1)});
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@ -284,7 +284,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler,
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std::optional<SamplerInfo> sampler_info) {
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const auto offset = static_cast<std::size_t>(sampler.index.Value());
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const auto offset = static_cast<u32>(sampler.index.Value());
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Tegra::Shader::TextureType type;
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bool is_array;
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@ -293,17 +293,14 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler,
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type = sampler_info->type;
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is_array = sampler_info->is_array;
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is_shadow = sampler_info->is_shadow;
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} else if (auto sampler = locker.ObtainBoundSampler(offset); sampler) {
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type = sampler->texture_type.Value();
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is_array = sampler->is_array.Value() != 0;
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is_shadow = sampler->is_shadow.Value() != 0;
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} else {
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auto sampler = locker.ObtainBoundSampler(offset);
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if (sampler) {
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type = sampler->texture_type.Value();
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is_array = sampler->is_array.Value() != 0;
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is_shadow = sampler->is_shadow.Value() != 0;
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} else {
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type = Tegra::Shader::TextureType::Texture2D;
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is_array = false;
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is_shadow = false;
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}
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type = Tegra::Shader::TextureType::Texture2D;
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is_array = false;
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is_shadow = false;
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}
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// If this sampler has already been used, return the existing mapping.
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@ -320,7 +317,7 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler,
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const std::size_t next_index = used_samplers.size();
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const Sampler entry{offset, next_index, type, is_array, is_shadow};
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return *used_samplers.emplace(entry).first;
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}
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} // namespace VideoCommon::Shader
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const Sampler& ShaderIR::GetBindlessSampler(const Tegra::Shader::Register& reg,
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std::optional<SamplerInfo> sampler_info) {
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@ -336,17 +333,14 @@ const Sampler& ShaderIR::GetBindlessSampler(const Tegra::Shader::Register& reg,
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type = sampler_info->type;
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is_array = sampler_info->is_array;
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is_shadow = sampler_info->is_shadow;
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} else if (auto sampler = locker.ObtainBindlessSampler(cbuf_index, cbuf_offset); sampler) {
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type = sampler->texture_type.Value();
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is_array = sampler->is_array.Value() != 0;
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is_shadow = sampler->is_shadow.Value() != 0;
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} else {
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auto sampler = locker.ObtainBindlessSampler(cbuf_index, cbuf_offset);
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if (sampler) {
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type = sampler->texture_type.Value();
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is_array = sampler->is_array.Value() != 0;
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is_shadow = sampler->is_shadow.Value() != 0;
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} else {
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type = Tegra::Shader::TextureType::Texture2D;
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is_array = false;
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is_shadow = false;
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}
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type = Tegra::Shader::TextureType::Texture2D;
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is_array = false;
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is_shadow = false;
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}
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// If this sampler has already been used, return the existing mapping.
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@ -127,6 +127,10 @@ public:
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return gpr == b.gpr && value == b.value;
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}
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bool operator!=(const ExprGprEqual& b) const {
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return !operator==(b);
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}
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u32 gpr;
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u32 value;
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};
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