From 52895fab674cb160f2559d08c21333f52d6deced Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Mon, 14 Mar 2022 19:35:48 -0400
Subject: [PATCH 1/5] shader: add support for const buffer indirect addressing
---
.../spirv/emit_spirv_context_get_set.cpp | 53 +++++++++++++++----
.../ir_opt/collect_shader_info_pass.cpp | 35 +++++++++---
2 files changed, 69 insertions(+), 19 deletions(-)
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 8ea730c807..1cfe1d49f9 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -124,25 +124,56 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr, u32 element_size,
const IR::Value& binding, const IR::Value& offset) {
- if (!binding.IsImmediate()) {
- throw NotImplementedException("Constant buffer indexing");
- }
- const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
+ std::array<Id, 2> indexes;
+
const Id uniform_type{ctx.uniform_types.*member_ptr};
- if (!offset.IsImmediate()) {
+ if (offset.IsImmediate()) {
+ // Hardware been proved to read the aligned offset (e.g. LDC.U32 at 6 will read offset 4)
+ const Id imm_offset{ctx.Const(offset.U32() / element_size)};
+ indexes = {ctx.u32_zero_value, imm_offset};
+ } else {
Id index{ctx.Def(offset)};
if (element_size > 1) {
const u32 log2_element_size{static_cast<u32>(std::countr_zero(element_size))};
const Id shift{ctx.Const(log2_element_size)};
index = ctx.OpShiftRightArithmetic(ctx.U32[1], ctx.Def(offset), shift);
}
- const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, index)};
- return ctx.OpLoad(result_type, access_chain);
+ indexes = {ctx.u32_zero_value, index};
+ }
+
+ if (binding.IsImmediate()) {
+ const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
+ const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, indexes)};
+ return ctx.OpLoad(result_type, access_chain);
+ } else {
+ const Id index{ctx.Def(binding)};
+ const Id ptr{ctx.TypePointer(spv::StorageClass::Function, result_type)};
+ const Id value{ctx.AddLocalVariable(ptr, spv::StorageClass::Function)};
+ const Id merge_label = ctx.OpLabel();
+
+ std::array<Id, Info::MAX_CBUFS> buf_labels;
+ std::array<Sirit::Literal, Info::MAX_CBUFS> buf_literals;
+ for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
+ buf_labels[i] = ctx.OpLabel();
+ buf_literals[i] = Sirit::Literal{i};
+ }
+
+ ctx.OpSelectionMerge(merge_label, spv::SelectionControlMask::MaskNone);
+ ctx.OpSwitch(index, buf_labels[0], buf_literals, buf_labels);
+
+ for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
+ ctx.AddLabel(buf_labels[i]);
+ const Id cbuf{ctx.cbufs[i].*member_ptr};
+ const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, indexes)};
+ const Id result = ctx.OpLoad(result_type, access_chain);
+ ctx.OpStore(value, result);
+ ctx.OpBranch(merge_label);
+ }
+
+ ctx.AddLabel(merge_label);
+
+ return ctx.OpLoad(result_type, value);
}
- // Hardware been proved to read the aligned offset (e.g. LDC.U32 at 6 will read offset 4)
- const Id imm_offset{ctx.Const(offset.U32() / element_size)};
- const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, imm_offset)};
- return ctx.OpLoad(result_type, access_chain);
}
Id GetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index bfd2ae650e..1a50dd3827 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -29,6 +29,20 @@ void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
});
}
+void AddRegisterIndexedLdc(Info& info) {
+ // The shader can use any possible constant buffer
+ info.constant_buffer_mask = (1 << Info::MAX_CBUFS) - 1;
+
+ auto& cbufs{info.constant_buffer_descriptors};
+ cbufs.clear();
+ for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
+ cbufs.push_back(ConstantBufferDescriptor{.index = i, .count = 1});
+
+ // The shader can use any possible access size
+ info.constant_buffer_used_sizes[i] = 0x10'000;
+ }
+}
+
void GetPatch(Info& info, IR::Patch patch) {
if (!IR::IsGeneric(patch)) {
throw NotImplementedException("Reading non-generic patch {}", patch);
@@ -463,10 +477,12 @@ void VisitUsages(Info& info, IR::Inst& inst) {
case IR::Opcode::GetCbufU32x2: {
const IR::Value index{inst.Arg(0)};
const IR::Value offset{inst.Arg(1)};
- if (!index.IsImmediate()) {
- throw NotImplementedException("Constant buffer with non-immediate index");
+ if (index.IsImmediate()) {
+ AddConstantBufferDescriptor(info, index.U32(), 1);
+ } else {
+ AddRegisterIndexedLdc(info);
}
- AddConstantBufferDescriptor(info, index.U32(), 1);
+
u32 element_size{};
switch (inst.GetOpcode()) {
case IR::Opcode::GetCbufU8:
@@ -494,11 +510,14 @@ void VisitUsages(Info& info, IR::Inst& inst) {
default:
break;
}
- u32& size{info.constant_buffer_used_sizes[index.U32()]};
- if (offset.IsImmediate()) {
- size = Common::AlignUp(std::max(size, offset.U32() + element_size), 16u);
- } else {
- size = 0x10'000;
+
+ if (index.IsImmediate()) {
+ u32& size{info.constant_buffer_used_sizes[index.U32()]};
+ if (offset.IsImmediate()) {
+ size = Common::AlignUp(std::max(size, offset.U32() + element_size), 16u);
+ } else {
+ size = 0x10'000;
+ }
}
break;
}
From 1415542f73fe013a010f03937697a1d22653b95c Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Wed, 16 Mar 2022 11:05:04 -0400
Subject: [PATCH 2/5] shader_recompiler: Implement LDC.IS address mode
---
.../maxwell/translate/impl/load_constant.cpp | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
index 2300088e38..8007a4d469 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
@@ -11,10 +11,20 @@ namespace Shader::Maxwell {
using namespace LDC;
namespace {
std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& imm_index,
- const IR::U32& reg, const IR::U32& imm) {
+ const IR::U32& reg, const IR::U32& imm_offset) {
switch (mode) {
case Mode::Default:
- return {imm_index, ir.IAdd(reg, imm)};
+ return {imm_index, ir.IAdd(reg, imm_offset)};
+ case Mode::IS: {
+ // Segmented addressing mode
+ // Ra+imm_offset points into a flat mapping of const buffer
+ // address space
+ const IR::U32 address{ir.IAdd(reg, imm_offset)};
+ const IR::U32 index{ir.BitFieldExtract(address, ir.Imm32(16), ir.Imm32(16))};
+ const IR::U32 offset{ir.BitFieldExtract(address, ir.Imm32(0), ir.Imm32(16))};
+
+ return {ir.IAdd(index, imm_index), offset};
+ }
default:
break;
}
From 3ac522ba41d10a254bc24bcdce8b0b2535f2b358 Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Thu, 17 Mar 2022 09:30:41 -0400
Subject: [PATCH 3/5] Address review comments
---
.../spirv/emit_spirv_context_get_set.cpp | 31 +++++++++----------
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 1cfe1d49f9..2646461156 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -124,31 +124,28 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr, u32 element_size,
const IR::Value& binding, const IR::Value& offset) {
- std::array<Id, 2> indexes;
+ Id buffer_offset;
const Id uniform_type{ctx.uniform_types.*member_ptr};
if (offset.IsImmediate()) {
// Hardware been proved to read the aligned offset (e.g. LDC.U32 at 6 will read offset 4)
const Id imm_offset{ctx.Const(offset.U32() / element_size)};
- indexes = {ctx.u32_zero_value, imm_offset};
+ buffer_offset = imm_offset;
+ } else if (element_size > 1) {
+ const u32 log2_element_size{static_cast<u32>(std::countr_zero(element_size))};
+ const Id shift{ctx.Const(log2_element_size)};
+ buffer_offset = ctx.OpShiftRightArithmetic(ctx.U32[1], ctx.Def(offset), shift);
} else {
- Id index{ctx.Def(offset)};
- if (element_size > 1) {
- const u32 log2_element_size{static_cast<u32>(std::countr_zero(element_size))};
- const Id shift{ctx.Const(log2_element_size)};
- index = ctx.OpShiftRightArithmetic(ctx.U32[1], ctx.Def(offset), shift);
- }
- indexes = {ctx.u32_zero_value, index};
+ buffer_offset = ctx.Def(offset);
}
if (binding.IsImmediate()) {
const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
- const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, indexes)};
+ const Id access_chain{
+ ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
return ctx.OpLoad(result_type, access_chain);
} else {
const Id index{ctx.Def(binding)};
- const Id ptr{ctx.TypePointer(spv::StorageClass::Function, result_type)};
- const Id value{ctx.AddLocalVariable(ptr, spv::StorageClass::Function)};
const Id merge_label = ctx.OpLabel();
std::array<Id, Info::MAX_CBUFS> buf_labels;
@@ -161,18 +158,20 @@ Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr,
ctx.OpSelectionMerge(merge_label, spv::SelectionControlMask::MaskNone);
ctx.OpSwitch(index, buf_labels[0], buf_literals, buf_labels);
+ std::array<Id, Info::MAX_CBUFS * 2> phi_targets;
for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
ctx.AddLabel(buf_labels[i]);
const Id cbuf{ctx.cbufs[i].*member_ptr};
- const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, indexes)};
- const Id result = ctx.OpLoad(result_type, access_chain);
- ctx.OpStore(value, result);
+ const Id access_chain{
+ ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
+ phi_targets[2 * i + 0] = ctx.OpLoad(result_type, access_chain);
+ phi_targets[2 * i + 1] = buf_labels[i];
ctx.OpBranch(merge_label);
}
ctx.AddLabel(merge_label);
- return ctx.OpLoad(result_type, value);
+ return ctx.OpPhi(result_type, phi_targets);
}
}
From e228a40db807c20a2484169bd0a1447a081ea1ce Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Thu, 17 Mar 2022 13:30:21 -0400
Subject: [PATCH 4/5] shader_recompiler: Use functions for indirect const
buffer accesses
---
.../spirv/emit_spirv_context_get_set.cpp | 58 ++++++-----------
.../backend/spirv/spirv_emit_context.cpp | 64 +++++++++++++++++++
.../backend/spirv/spirv_emit_context.h | 8 +++
.../ir_opt/collect_shader_info_pass.cpp | 2 +
src/shader_recompiler/shader_info.h | 1 +
5 files changed, 94 insertions(+), 39 deletions(-)
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 2646461156..9f6d5e3a5a 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -123,7 +123,7 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
}
Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr, u32 element_size,
- const IR::Value& binding, const IR::Value& offset) {
+ const IR::Value& binding, const IR::Value& offset, const Id indirect_func) {
Id buffer_offset;
const Id uniform_type{ctx.uniform_types.*member_ptr};
@@ -145,42 +145,19 @@ Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr,
ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
return ctx.OpLoad(result_type, access_chain);
} else {
- const Id index{ctx.Def(binding)};
- const Id merge_label = ctx.OpLabel();
-
- std::array<Id, Info::MAX_CBUFS> buf_labels;
- std::array<Sirit::Literal, Info::MAX_CBUFS> buf_literals;
- for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
- buf_labels[i] = ctx.OpLabel();
- buf_literals[i] = Sirit::Literal{i};
- }
-
- ctx.OpSelectionMerge(merge_label, spv::SelectionControlMask::MaskNone);
- ctx.OpSwitch(index, buf_labels[0], buf_literals, buf_labels);
-
- std::array<Id, Info::MAX_CBUFS * 2> phi_targets;
- for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
- ctx.AddLabel(buf_labels[i]);
- const Id cbuf{ctx.cbufs[i].*member_ptr};
- const Id access_chain{
- ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
- phi_targets[2 * i + 0] = ctx.OpLoad(result_type, access_chain);
- phi_targets[2 * i + 1] = buf_labels[i];
- ctx.OpBranch(merge_label);
- }
-
- ctx.AddLabel(merge_label);
-
- return ctx.OpPhi(result_type, phi_targets);
+ const std::array<Id, 2> arguments{ctx.Def(binding), buffer_offset};
+ return ctx.OpFunctionCall(result_type, indirect_func, arguments);
}
}
Id GetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
- return GetCbuf(ctx, ctx.U32[1], &UniformDefinitions::U32, sizeof(u32), binding, offset);
+ return GetCbuf(ctx, ctx.U32[1], &UniformDefinitions::U32, sizeof(u32), binding, offset,
+ ctx.load_const_func_u32);
}
Id GetCbufU32x4(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
- return GetCbuf(ctx, ctx.U32[4], &UniformDefinitions::U32x4, sizeof(u32[4]), binding, offset);
+ return GetCbuf(ctx, ctx.U32[4], &UniformDefinitions::U32x4, sizeof(u32[4]), binding, offset,
+ ctx.load_const_func_u32x4);
}
Id GetCbufElement(EmitContext& ctx, Id vector, const IR::Value& offset, u32 index_offset) {
@@ -231,7 +208,8 @@ void EmitGetIndirectBranchVariable(EmitContext&) {
Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int8) {
- const Id load{GetCbuf(ctx, ctx.U8, &UniformDefinitions::U8, sizeof(u8), binding, offset)};
+ const Id load{GetCbuf(ctx, ctx.U8, &UniformDefinitions::U8, sizeof(u8), binding, offset,
+ ctx.load_const_func_u8)};
return ctx.OpUConvert(ctx.U32[1], load);
}
Id element{};
@@ -247,7 +225,8 @@ Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& of
Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int8) {
- const Id load{GetCbuf(ctx, ctx.S8, &UniformDefinitions::S8, sizeof(s8), binding, offset)};
+ const Id load{GetCbuf(ctx, ctx.S8, &UniformDefinitions::S8, sizeof(s8), binding, offset,
+ ctx.load_const_func_u8)};
return ctx.OpSConvert(ctx.U32[1], load);
}
Id element{};
@@ -263,8 +242,8 @@ Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& of
Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int16) {
- const Id load{
- GetCbuf(ctx, ctx.U16, &UniformDefinitions::U16, sizeof(u16), binding, offset)};
+ const Id load{GetCbuf(ctx, ctx.U16, &UniformDefinitions::U16, sizeof(u16), binding, offset,
+ ctx.load_const_func_u16)};
return ctx.OpUConvert(ctx.U32[1], load);
}
Id element{};
@@ -280,8 +259,8 @@ Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& o
Id EmitGetCbufS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int16) {
- const Id load{
- GetCbuf(ctx, ctx.S16, &UniformDefinitions::S16, sizeof(s16), binding, offset)};
+ const Id load{GetCbuf(ctx, ctx.S16, &UniformDefinitions::S16, sizeof(s16), binding, offset,
+ ctx.load_const_func_u16)};
return ctx.OpSConvert(ctx.U32[1], load);
}
Id element{};
@@ -306,7 +285,8 @@ Id EmitGetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& o
Id EmitGetCbufF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing) {
- return GetCbuf(ctx, ctx.F32[1], &UniformDefinitions::F32, sizeof(f32), binding, offset);
+ return GetCbuf(ctx, ctx.F32[1], &UniformDefinitions::F32, sizeof(f32), binding, offset,
+ ctx.load_const_func_f32);
} else {
const Id vector{GetCbufU32x4(ctx, binding, offset)};
return ctx.OpBitcast(ctx.F32[1], GetCbufElement(ctx, vector, offset, 0u));
@@ -315,8 +295,8 @@ Id EmitGetCbufF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& o
Id EmitGetCbufU32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (ctx.profile.support_descriptor_aliasing) {
- return GetCbuf(ctx, ctx.U32[2], &UniformDefinitions::U32x2, sizeof(u32[2]), binding,
- offset);
+ return GetCbuf(ctx, ctx.U32[2], &UniformDefinitions::U32x2, sizeof(u32[2]), binding, offset,
+ ctx.load_const_func_u32x2);
} else {
const Id vector{GetCbufU32x4(ctx, binding, offset)};
return ctx.OpCompositeConstruct(ctx.U32[2], GetCbufElement(ctx, vector, offset, 0u),
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
index cd90c084aa..f85541a2e2 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
@@ -464,6 +464,7 @@ EmitContext::EmitContext(const Profile& profile_, const RuntimeInfo& runtime_inf
DefineSharedMemory(program);
DefineSharedMemoryFunctions(program);
DefineConstantBuffers(program.info, uniform_binding);
+ DefineConstantBufferIndirectFunctions(program.info);
DefineStorageBuffers(program.info, storage_binding);
DefineTextureBuffers(program.info, texture_binding);
DefineImageBuffers(program.info, image_binding);
@@ -1027,6 +1028,69 @@ void EmitContext::DefineConstantBuffers(const Info& info, u32& binding) {
binding += static_cast<u32>(info.constant_buffer_descriptors.size());
}
+void EmitContext::DefineConstantBufferIndirectFunctions(const Info& info) {
+ if (!info.uses_cbuf_indirect) {
+ return;
+ }
+
+ const auto make_accessor{[&](Id buffer_type, Id UniformDefinitions::*member_ptr) {
+ const Id func_type{TypeFunction(buffer_type, U32[1], U32[1])};
+ const Id func{OpFunction(buffer_type, spv::FunctionControlMask::MaskNone, func_type)};
+ const Id binding{OpFunctionParameter(U32[1])};
+ const Id offset{OpFunctionParameter(U32[1])};
+
+ AddLabel();
+
+ const Id merge_label{OpLabel()};
+ const Id uniform_type{uniform_types.*member_ptr};
+
+ std::array<Id, Info::MAX_CBUFS> buf_labels;
+ std::array<Sirit::Literal, Info::MAX_CBUFS> buf_literals;
+ for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
+ buf_labels[i] = OpLabel();
+ buf_literals[i] = Sirit::Literal{i};
+ }
+
+ OpSelectionMerge(merge_label, spv::SelectionControlMask::MaskNone);
+ OpSwitch(binding, buf_labels[0], buf_literals, buf_labels);
+
+ for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
+ AddLabel(buf_labels[i]);
+ const Id cbuf{cbufs[i].*member_ptr};
+ const Id access_chain{OpAccessChain(uniform_type, cbuf, u32_zero_value, offset)};
+ const Id result{OpLoad(buffer_type, access_chain)};
+ OpReturnValue(result);
+ }
+
+ AddLabel(merge_label);
+ OpUnreachable();
+ OpFunctionEnd();
+
+ return func;
+ }};
+
+ IR::Type types{info.used_constant_buffer_types};
+
+ if (True(types & IR::Type::U8)) {
+ load_const_func_u8 = make_accessor(U8, &UniformDefinitions::U8);
+ }
+ if (True(types & IR::Type::U16)) {
+ load_const_func_u16 = make_accessor(U16, &UniformDefinitions::U16);
+ }
+ if (True(types & IR::Type::F32)) {
+ load_const_func_f32 = make_accessor(F32[1], &UniformDefinitions::F32);
+ }
+ if (True(types & IR::Type::U32)) {
+ load_const_func_u32 = make_accessor(U32[1], &UniformDefinitions::U32);
+ }
+ if (True(types & IR::Type::U32x2)) {
+ load_const_func_u32x2 = make_accessor(U32[2], &UniformDefinitions::U32x2);
+ }
+ if (True(types & IR::Type::U32x4)) {
+ load_const_func_u32x4 = make_accessor(U32[4], &UniformDefinitions::U32x4);
+ }
+}
+
void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
if (info.storage_buffers_descriptors.empty()) {
return;
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.h b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
index f87138f7e7..906a1dc2c2 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.h
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
@@ -294,6 +294,13 @@ public:
std::vector<Id> interfaces;
+ Id load_const_func_u8{};
+ Id load_const_func_u16{};
+ Id load_const_func_u32{};
+ Id load_const_func_f32{};
+ Id load_const_func_u32x2{};
+ Id load_const_func_u32x4{};
+
private:
void DefineCommonTypes(const Info& info);
void DefineCommonConstants();
@@ -302,6 +309,7 @@ private:
void DefineSharedMemory(const IR::Program& program);
void DefineSharedMemoryFunctions(const IR::Program& program);
void DefineConstantBuffers(const Info& info, u32& binding);
+ void DefineConstantBufferIndirectFunctions(const Info& info);
void DefineStorageBuffers(const Info& info, u32& binding);
void DefineTextureBuffers(const Info& info, u32& binding);
void DefineImageBuffers(const Info& info, u32& binding);
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index 1a50dd3827..b54894a9b5 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -30,6 +30,8 @@ void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
}
void AddRegisterIndexedLdc(Info& info) {
+ info.uses_cbuf_indirect = true;
+
// The shader can use any possible constant buffer
info.constant_buffer_mask = (1 << Info::MAX_CBUFS) - 1;
diff --git a/src/shader_recompiler/shader_info.h b/src/shader_recompiler/shader_info.h
index 9f375c30e5..9cff2e42d9 100644
--- a/src/shader_recompiler/shader_info.h
+++ b/src/shader_recompiler/shader_info.h
@@ -173,6 +173,7 @@ struct Info {
bool uses_atomic_image_u32{};
bool uses_shadow_lod{};
bool uses_rescaling_uniform{};
+ bool uses_cbuf_indirect{};
IR::Type used_constant_buffer_types{};
IR::Type used_storage_buffer_types{};
From 3009d0bd7d30b341a8697d85d9d42a9ee4910d19 Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Thu, 17 Mar 2022 14:45:38 -0400
Subject: [PATCH 5/5] Address review comments
---
.../spirv/emit_spirv_context_get_set.cpp | 15 ++---
.../backend/spirv/spirv_emit_context.cpp | 11 +---
.../ir_opt/collect_shader_info_pass.cpp | 61 +++++++++----------
src/shader_recompiler/shader_info.h | 1 +
4 files changed, 36 insertions(+), 52 deletions(-)
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 9f6d5e3a5a..80b4bbd277 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -125,7 +125,6 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr, u32 element_size,
const IR::Value& binding, const IR::Value& offset, const Id indirect_func) {
Id buffer_offset;
-
const Id uniform_type{ctx.uniform_types.*member_ptr};
if (offset.IsImmediate()) {
// Hardware been proved to read the aligned offset (e.g. LDC.U32 at 6 will read offset 4)
@@ -138,16 +137,12 @@ Id GetCbuf(EmitContext& ctx, Id result_type, Id UniformDefinitions::*member_ptr,
} else {
buffer_offset = ctx.Def(offset);
}
-
- if (binding.IsImmediate()) {
- const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
- const Id access_chain{
- ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
- return ctx.OpLoad(result_type, access_chain);
- } else {
- const std::array<Id, 2> arguments{ctx.Def(binding), buffer_offset};
- return ctx.OpFunctionCall(result_type, indirect_func, arguments);
+ if (!binding.IsImmediate()) {
+ return ctx.OpFunctionCall(result_type, indirect_func, ctx.Def(binding), buffer_offset);
}
+ const Id cbuf{ctx.cbufs[binding.U32()].*member_ptr};
+ const Id access_chain{ctx.OpAccessChain(uniform_type, cbuf, ctx.u32_zero_value, buffer_offset)};
+ return ctx.OpLoad(result_type, access_chain);
}
Id GetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
index f85541a2e2..aa5b6c9b73 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
@@ -994,7 +994,7 @@ void EmitContext::DefineConstantBuffers(const Info& info, u32& binding) {
}
return;
}
- IR::Type types{info.used_constant_buffer_types};
+ IR::Type types{info.used_constant_buffer_types | info.used_indirect_cbuf_types};
if (True(types & IR::Type::U8)) {
if (profile.support_int8) {
DefineConstBuffers(*this, info, &UniformDefinitions::U8, binding, U8, 'u', sizeof(u8));
@@ -1032,7 +1032,6 @@ void EmitContext::DefineConstantBufferIndirectFunctions(const Info& info) {
if (!info.uses_cbuf_indirect) {
return;
}
-
const auto make_accessor{[&](Id buffer_type, Id UniformDefinitions::*member_ptr) {
const Id func_type{TypeFunction(buffer_type, U32[1], U32[1])};
const Id func{OpFunction(buffer_type, spv::FunctionControlMask::MaskNone, func_type)};
@@ -1050,10 +1049,8 @@ void EmitContext::DefineConstantBufferIndirectFunctions(const Info& info) {
buf_labels[i] = OpLabel();
buf_literals[i] = Sirit::Literal{i};
}
-
OpSelectionMerge(merge_label, spv::SelectionControlMask::MaskNone);
OpSwitch(binding, buf_labels[0], buf_literals, buf_labels);
-
for (u32 i = 0; i < Info::MAX_CBUFS; i++) {
AddLabel(buf_labels[i]);
const Id cbuf{cbufs[i].*member_ptr};
@@ -1061,16 +1058,12 @@ void EmitContext::DefineConstantBufferIndirectFunctions(const Info& info) {
const Id result{OpLoad(buffer_type, access_chain)};
OpReturnValue(result);
}
-
AddLabel(merge_label);
OpUnreachable();
OpFunctionEnd();
-
return func;
}};
-
- IR::Type types{info.used_constant_buffer_types};
-
+ IR::Type types{info.used_indirect_cbuf_types};
if (True(types & IR::Type::U8)) {
load_const_func_u8 = make_accessor(U8, &UniformDefinitions::U8);
}
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index b54894a9b5..0b2c608427 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -45,6 +45,30 @@ void AddRegisterIndexedLdc(Info& info) {
}
}
+u32 GetElementSize(IR::Type& used_type, Shader::IR::Opcode opcode) {
+ switch (opcode) {
+ case IR::Opcode::GetCbufU8:
+ case IR::Opcode::GetCbufS8:
+ used_type |= IR::Type::U8;
+ return 1;
+ case IR::Opcode::GetCbufU16:
+ case IR::Opcode::GetCbufS16:
+ used_type |= IR::Type::U16;
+ return 2;
+ case IR::Opcode::GetCbufU32:
+ used_type |= IR::Type::U32;
+ return 4;
+ case IR::Opcode::GetCbufF32:
+ used_type |= IR::Type::F32;
+ return 4;
+ case IR::Opcode::GetCbufU32x2:
+ used_type |= IR::Type::U32x2;
+ return 8;
+ default:
+ throw InvalidArgument("Invalid opcode {}", opcode);
+ }
+}
+
void GetPatch(Info& info, IR::Patch patch) {
if (!IR::IsGeneric(patch)) {
throw NotImplementedException("Reading non-generic patch {}", patch);
@@ -481,45 +505,16 @@ void VisitUsages(Info& info, IR::Inst& inst) {
const IR::Value offset{inst.Arg(1)};
if (index.IsImmediate()) {
AddConstantBufferDescriptor(info, index.U32(), 1);
- } else {
- AddRegisterIndexedLdc(info);
- }
-
- u32 element_size{};
- switch (inst.GetOpcode()) {
- case IR::Opcode::GetCbufU8:
- case IR::Opcode::GetCbufS8:
- info.used_constant_buffer_types |= IR::Type::U8;
- element_size = 1;
- break;
- case IR::Opcode::GetCbufU16:
- case IR::Opcode::GetCbufS16:
- info.used_constant_buffer_types |= IR::Type::U16;
- element_size = 2;
- break;
- case IR::Opcode::GetCbufU32:
- info.used_constant_buffer_types |= IR::Type::U32;
- element_size = 4;
- break;
- case IR::Opcode::GetCbufF32:
- info.used_constant_buffer_types |= IR::Type::F32;
- element_size = 4;
- break;
- case IR::Opcode::GetCbufU32x2:
- info.used_constant_buffer_types |= IR::Type::U32x2;
- element_size = 8;
- break;
- default:
- break;
- }
-
- if (index.IsImmediate()) {
+ u32 element_size = GetElementSize(info.used_constant_buffer_types, inst.GetOpcode());
u32& size{info.constant_buffer_used_sizes[index.U32()]};
if (offset.IsImmediate()) {
size = Common::AlignUp(std::max(size, offset.U32() + element_size), 16u);
} else {
size = 0x10'000;
}
+ } else {
+ AddRegisterIndexedLdc(info);
+ GetElementSize(info.used_indirect_cbuf_types, inst.GetOpcode());
}
break;
}
diff --git a/src/shader_recompiler/shader_info.h b/src/shader_recompiler/shader_info.h
index 9cff2e42d9..9d36bd9ebc 100644
--- a/src/shader_recompiler/shader_info.h
+++ b/src/shader_recompiler/shader_info.h
@@ -177,6 +177,7 @@ struct Info {
IR::Type used_constant_buffer_types{};
IR::Type used_storage_buffer_types{};
+ IR::Type used_indirect_cbuf_types{};
u32 constant_buffer_mask{};
std::array<u32, MAX_CBUFS> constant_buffer_used_sizes{};