GPU/TIC: Added the pitch and block height fields to the TIC structure.
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@ -4,6 +4,7 @@
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#pragma once
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#pragma once
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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#include "common/common_types.h"
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@ -57,6 +58,8 @@ union TextureHandle {
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static_assert(sizeof(TextureHandle) == 4, "TextureHandle has wrong size");
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static_assert(sizeof(TextureHandle) == 4, "TextureHandle has wrong size");
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struct TICEntry {
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struct TICEntry {
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static constexpr u32 DefaultBlockHeight = 16;
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union {
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union {
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u32 raw;
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u32 raw;
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BitField<0, 7, TextureFormat> format;
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BitField<0, 7, TextureFormat> format;
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@ -70,7 +73,12 @@ struct TICEntry {
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BitField<0, 16, u32> address_high;
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BitField<0, 16, u32> address_high;
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BitField<21, 3, TICHeaderVersion> header_version;
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BitField<21, 3, TICHeaderVersion> header_version;
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};
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};
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INSERT_PADDING_BYTES(4);
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union {
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BitField<3, 3, u32> block_height;
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// High 16 bits of the pitch value
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BitField<0, 16, u32> pitch_high;
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};
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union {
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union {
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BitField<0, 16, u32> width_minus_1;
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BitField<0, 16, u32> width_minus_1;
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BitField<23, 4, TextureType> texture_type;
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BitField<23, 4, TextureType> texture_type;
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@ -82,6 +90,13 @@ struct TICEntry {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
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}
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}
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u32 Pitch() const {
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ASSERT(header_version == TICHeaderVersion::Pitch ||
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header_version == TICHeaderVersion::PitchColorKey);
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// The pitch value is 21 bits, and is 32B aligned.
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return pitch_high << 5;
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}
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u32 Width() const {
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u32 Width() const {
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return width_minus_1 + 1;
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return width_minus_1 + 1;
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}
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}
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