yuzu/src/video_core/engines
ReinUsesLisp 4e35177e23 shader_ir: Implement VOTE
Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics

Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.

To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:

* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true

ballotARB, also known as "uint64_t(activeThreadsNV())", emits

VOTE.ANY Rd, PT, PT;

on nouveau's compiler. This doesn't match exactly to Nvidia's code

VOTE.ALL Rd, PT, PT;

Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
2019-08-21 14:50:38 -03:00
..
const_buffer_info.h
engine_upload.cpp decoders: correct block calculation 2019-06-20 21:38:34 -03:00
engine_upload.h decoders: correct block calculation 2019-06-20 21:38:34 -03:00
fermi_2d.cpp
fermi_2d.h decoders: correct block calculation 2019-06-20 21:38:34 -03:00
kepler_compute.cpp Merge pull request #2734 from ReinUsesLisp/compute-shaders 2019-07-22 11:12:55 -04:00
kepler_compute.h
kepler_memory.cpp Maxwell3D: Rework the dirty system to be more consistant and scaleable 2019-07-17 17:29:49 -04:00
kepler_memory.h
maxwell_3d.cpp Merge pull request #2592 from FernandoS27/sync1 2019-07-26 14:26:44 -04:00
maxwell_3d.h Merge pull request #2704 from FernandoS27/conditional 2019-07-24 17:07:57 -04:00
maxwell_dma.cpp Merge pull request #2743 from FernandoS27/surpress-assert 2019-07-25 12:34:36 -04:00
maxwell_dma.h decoders: correct block calculation 2019-06-20 21:38:34 -03:00
shader_bytecode.h shader_ir: Implement VOTE 2019-08-21 14:50:38 -03:00
shader_header.h