182 lines
7.1 KiB
C++
182 lines
7.1 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <numeric>
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#include <type_traits>
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/function.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/program.h"
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namespace Shader::Backend::SPIRV {
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EmitContext::EmitContext(IR::Program& program) {
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AddCapability(spv::Capability::Shader);
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AddCapability(spv::Capability::Float16);
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AddCapability(spv::Capability::Float64);
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void_id = TypeVoid();
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u1 = Name(TypeBool(), "u1");
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f32.Define(*this, TypeFloat(32), "f32");
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u32.Define(*this, TypeInt(32, false), "u32");
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f16.Define(*this, TypeFloat(16), "f16");
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f64.Define(*this, TypeFloat(64), "f64");
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true_value = ConstantTrue(u1);
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false_value = ConstantFalse(u1);
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for (const IR::Function& function : program.functions) {
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for (IR::Block* const block : function.blocks) {
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block_label_map.emplace_back(block, OpLabel());
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}
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}
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std::ranges::sort(block_label_map, {}, &std::pair<IR::Block*, Id>::first);
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}
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EmitContext::~EmitContext() = default;
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EmitSPIRV::EmitSPIRV(IR::Program& program) {
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EmitContext ctx{program};
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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// FIXME: Forward declare functions (needs sirit support)
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Id func{};
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for (IR::Function& function : program.functions) {
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func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function);
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for (IR::Block* const block : function.blocks) {
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ctx.AddLabel(ctx.BlockLabel(block));
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for (IR::Inst& inst : block->Instructions()) {
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EmitInst(ctx, &inst);
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}
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}
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ctx.OpFunctionEnd();
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}
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ctx.AddEntryPoint(spv::ExecutionModel::GLCompute, func, "main");
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std::vector<u32> result{ctx.Assemble()};
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std::FILE* file{std::fopen("shader.spv", "wb")};
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std::fwrite(result.data(), sizeof(u32), result.size(), file);
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std::fclose(file);
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std::system("spirv-dis shader.spv");
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std::system("spirv-val shader.spv");
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std::system("spirv-cross shader.spv");
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}
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template <auto method>
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static void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst) {
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using M = decltype(method);
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using std::is_invocable_r_v;
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if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&>) {
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ctx.Define(inst, (emit.*method)(ctx));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id>) {
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ctx.Define(inst, (emit.*method)(ctx, ctx.Def(inst->Arg(0))));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, Id>) {
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ctx.Define(inst, (emit.*method)(ctx, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1))));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, Id, Id>) {
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ctx.Define(inst, (emit.*method)(ctx, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)),
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ctx.Def(inst->Arg(2))));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, IR::Inst*, Id, Id>) {
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ctx.Define(inst, (emit.*method)(ctx, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1))));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, IR::Inst*, Id, Id, Id>) {
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ctx.Define(inst, (emit.*method)(ctx, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)),
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ctx.Def(inst->Arg(2))));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, u32>) {
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ctx.Define(inst, (emit.*method)(ctx, ctx.Def(inst->Arg(0)), inst->Arg(1).U32()));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, const IR::Value&>) {
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ctx.Define(inst, (emit.*method)(ctx, inst->Arg(0)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, const IR::Value&,
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const IR::Value&>) {
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ctx.Define(inst, (emit.*method)(ctx, inst->Arg(0), inst->Arg(1)));
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} else if constexpr (is_invocable_r_v<void, M, EmitSPIRV&, EmitContext&, IR::Inst*>) {
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(emit.*method)(ctx, inst);
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} else if constexpr (is_invocable_r_v<void, M, EmitSPIRV&, EmitContext&>) {
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(emit.*method)(ctx);
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} else {
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static_assert(false, "Bad format");
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}
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}
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void EmitSPIRV::EmitInst(EmitContext& ctx, IR::Inst* inst) {
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switch (inst->Opcode()) {
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#define OPCODE(name, result_type, ...) \
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case IR::Opcode::name: \
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return Invoke<&EmitSPIRV::Emit##name>(*this, ctx, inst);
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#include "shader_recompiler/frontend/ir/opcodes.inc"
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#undef OPCODE
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}
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throw LogicError("Invalid opcode {}", inst->Opcode());
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}
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static Id TypeId(const EmitContext& ctx, IR::Type type) {
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switch (type) {
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case IR::Type::U1:
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return ctx.u1;
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case IR::Type::U32:
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return ctx.u32[1];
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default:
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throw NotImplementedException("Phi node type {}", type);
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}
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}
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Id EmitSPIRV::EmitPhi(EmitContext& ctx, IR::Inst* inst) {
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const size_t num_args{inst->NumArgs()};
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boost::container::small_vector<Id, 64> operands;
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operands.reserve(num_args * 2);
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for (size_t index = 0; index < num_args; ++index) {
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IR::Block* const phi_block{inst->PhiBlock(index)};
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operands.push_back(ctx.Def(inst->Arg(index)));
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operands.push_back(ctx.BlockLabel(phi_block));
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}
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const Id result_type{TypeId(ctx, inst->Arg(0).Type())};
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return ctx.OpPhi(result_type, std::span(operands.data(), operands.size()));
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}
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void EmitSPIRV::EmitVoid(EmitContext&) {}
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void EmitSPIRV::EmitIdentity(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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// FIXME: Move to its own file
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void EmitSPIRV::EmitBranch(EmitContext& ctx, IR::Inst* inst) {
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ctx.OpBranch(ctx.BlockLabel(inst->Arg(0).Label()));
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}
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void EmitSPIRV::EmitBranchConditional(EmitContext& ctx, IR::Inst* inst) {
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ctx.OpBranchConditional(ctx.Def(inst->Arg(0)), ctx.BlockLabel(inst->Arg(1).Label()),
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ctx.BlockLabel(inst->Arg(2).Label()));
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}
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void EmitSPIRV::EmitLoopMerge(EmitContext& ctx, IR::Inst* inst) {
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ctx.OpLoopMerge(ctx.BlockLabel(inst->Arg(0).Label()), ctx.BlockLabel(inst->Arg(1).Label()),
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spv::LoopControlMask::MaskNone);
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}
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void EmitSPIRV::EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst) {
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ctx.OpSelectionMerge(ctx.BlockLabel(inst->Arg(0).Label()), spv::SelectionControlMask::MaskNone);
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}
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void EmitSPIRV::EmitReturn(EmitContext& ctx) {
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ctx.OpReturn();
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}
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void EmitSPIRV::EmitGetZeroFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitSPIRV::EmitGetSignFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitSPIRV::EmitGetCarryFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitSPIRV::EmitGetOverflowFromOp(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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} // namespace Shader::Backend::SPIRV
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