98 lines
3.1 KiB
C++
98 lines
3.1 KiB
C++
// Copyright 2018 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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GPUVAddr MemoryManager::AllocateSpace(u64 size, u64 align) {
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boost::optional<GPUVAddr> gpu_addr = FindFreeBlock(size, align);
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ASSERT(gpu_addr);
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for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
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ASSERT(PageSlot(*gpu_addr + offset) == static_cast<u64>(PageStatus::Unmapped));
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PageSlot(*gpu_addr + offset) = static_cast<u64>(PageStatus::Allocated);
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}
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return *gpu_addr;
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}
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GPUVAddr MemoryManager::AllocateSpace(GPUVAddr gpu_addr, u64 size, u64 align) {
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for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
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ASSERT(PageSlot(gpu_addr + offset) == static_cast<u64>(PageStatus::Unmapped));
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PageSlot(gpu_addr + offset) = static_cast<u64>(PageStatus::Allocated);
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}
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return gpu_addr;
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}
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GPUVAddr MemoryManager::MapBufferEx(VAddr cpu_addr, u64 size) {
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boost::optional<GPUVAddr> gpu_addr = FindFreeBlock(size, PAGE_SIZE);
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ASSERT(gpu_addr);
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for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
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ASSERT(PageSlot(*gpu_addr + offset) == static_cast<u64>(PageStatus::Unmapped));
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PageSlot(*gpu_addr + offset) = cpu_addr + offset;
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}
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return *gpu_addr;
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}
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GPUVAddr MemoryManager::MapBufferEx(VAddr cpu_addr, GPUVAddr gpu_addr, u64 size) {
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ASSERT((gpu_addr & PAGE_MASK) == 0);
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for (u64 offset = 0; offset < size; offset += PAGE_SIZE) {
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ASSERT(PageSlot(gpu_addr + offset) == static_cast<u64>(PageStatus::Allocated));
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PageSlot(gpu_addr + offset) = cpu_addr + offset;
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}
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return gpu_addr;
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}
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boost::optional<GPUVAddr> MemoryManager::FindFreeBlock(u64 size, u64 align) {
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GPUVAddr gpu_addr = 0;
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u64 free_space = 0;
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align = (align + PAGE_MASK) & ~PAGE_MASK;
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while (gpu_addr + free_space < MAX_ADDRESS) {
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if (!IsPageMapped(gpu_addr + free_space)) {
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free_space += PAGE_SIZE;
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if (free_space >= size) {
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return gpu_addr;
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}
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} else {
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gpu_addr += free_space + PAGE_SIZE;
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free_space = 0;
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gpu_addr = Common::AlignUp(gpu_addr, align);
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}
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}
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return {};
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}
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VAddr MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) {
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VAddr base_addr = PageSlot(gpu_addr);
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ASSERT(base_addr != static_cast<u64>(PageStatus::Unmapped));
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return base_addr + (gpu_addr & PAGE_MASK);
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}
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bool MemoryManager::IsPageMapped(GPUVAddr gpu_addr) {
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return PageSlot(gpu_addr) != static_cast<u64>(PageStatus::Unmapped);
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}
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VAddr& MemoryManager::PageSlot(GPUVAddr gpu_addr) {
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auto& block = page_table[(gpu_addr >> (PAGE_BITS + PAGE_TABLE_BITS)) & PAGE_TABLE_MASK];
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if (!block) {
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block = std::make_unique<PageBlock>();
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for (unsigned index = 0; index < PAGE_BLOCK_SIZE; index++) {
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(*block)[index] = static_cast<u64>(PageStatus::Unmapped);
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}
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}
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return (*block)[(gpu_addr >> PAGE_BITS) & PAGE_BLOCK_MASK];
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}
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} // namespace Tegra
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