90 lines
3.7 KiB
C++
90 lines
3.7 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "video_core/engines/fermi_2d.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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namespace Tegra::Engines {
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Fermi2D::Fermi2D(VideoCore::RasterizerInterface& rasterizer) : rasterizer{rasterizer} {}
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void Fermi2D::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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"Invalid Fermi2D register, increase the size of the Regs structure");
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regs.reg_array[method_call.method] = method_call.argument;
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switch (method_call.method) {
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// Trigger the surface copy on the last register write. This is blit_src_y, but this is 64-bit,
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// so trigger on the second 32-bit write.
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case FERMI2D_REG_INDEX(blit_src_y) + 1: {
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HandleSurfaceCopy();
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break;
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}
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}
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}
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static std::pair<u32, u32> DelimitLine(u32 src_1, u32 src_2, u32 dst_1, u32 dst_2, u32 src_line) {
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const u32 line_a = src_2 - src_1;
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const u32 line_b = dst_2 - dst_1;
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const u32 excess = std::max<s32>(0, line_a - src_line + src_1);
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return {line_b - (excess * line_b) / line_a, excess};
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}
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void Fermi2D::HandleSurfaceCopy() {
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LOG_DEBUG(HW_GPU, "Requested a surface copy with operation {}",
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static_cast<u32>(regs.operation));
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// TODO(Subv): Only raw copies are implemented.
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ASSERT(regs.operation == Operation::SrcCopy);
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const u32 src_blit_x1{static_cast<u32>(regs.blit_src_x >> 32)};
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const u32 src_blit_y1{static_cast<u32>(regs.blit_src_y >> 32)};
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u32 src_blit_x2, src_blit_y2;
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if (regs.blit_control.origin == Origin::Corner) {
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src_blit_x2 =
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static_cast<u32>((regs.blit_src_x + (regs.blit_du_dx * regs.blit_dst_width)) >> 32);
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src_blit_y2 =
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static_cast<u32>((regs.blit_src_y + (regs.blit_dv_dy * regs.blit_dst_height)) >> 32);
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} else {
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src_blit_x2 = static_cast<u32>((regs.blit_src_x >> 32) + regs.blit_dst_width);
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src_blit_y2 = static_cast<u32>((regs.blit_src_y >> 32) + regs.blit_dst_height);
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}
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u32 dst_blit_x2 = regs.blit_dst_x + regs.blit_dst_width;
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u32 dst_blit_y2 = regs.blit_dst_y + regs.blit_dst_height;
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const auto [new_dst_w, src_excess_x] =
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DelimitLine(src_blit_x1, src_blit_x2, regs.blit_dst_x, dst_blit_x2, regs.src.width);
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const auto [new_dst_h, src_excess_y] =
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DelimitLine(src_blit_y1, src_blit_y2, regs.blit_dst_y, dst_blit_y2, regs.src.height);
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dst_blit_x2 = new_dst_w + regs.blit_dst_x;
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src_blit_x2 = src_blit_x2 - src_excess_x;
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dst_blit_y2 = new_dst_h + regs.blit_dst_y;
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src_blit_y2 = src_blit_y2 - src_excess_y;
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const auto [new_src_w, dst_excess_x] =
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DelimitLine(regs.blit_dst_x, dst_blit_x2, src_blit_x1, src_blit_x2, regs.dst.width);
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const auto [new_src_h, dst_excess_y] =
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DelimitLine(regs.blit_dst_y, dst_blit_y2, src_blit_y1, src_blit_y2, regs.dst.height);
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src_blit_x2 = new_src_w + src_blit_x1;
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dst_blit_x2 = dst_blit_x2 - dst_excess_x;
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src_blit_y2 = new_src_h + src_blit_y1;
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dst_blit_y2 = dst_blit_y2 - dst_excess_y;
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const Common::Rectangle<u32> src_rect{src_blit_x1, src_blit_y1, src_blit_x2, src_blit_y2};
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const Common::Rectangle<u32> dst_rect{regs.blit_dst_x, regs.blit_dst_y, dst_blit_x2,
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dst_blit_y2};
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Config copy_config;
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copy_config.operation = regs.operation;
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copy_config.filter = regs.blit_control.filter;
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copy_config.src_rect = src_rect;
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copy_config.dst_rect = dst_rect;
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if (!rasterizer.AccelerateSurfaceCopy(regs.src, regs.dst, copy_config)) {
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UNIMPLEMENTED();
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}
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}
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} // namespace Tegra::Engines
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